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Formal Analysis of DDML

dc.contributor.authorSoremekun, Olamide Ezekiel
dc.date.accessioned2016-06-07T08:33:10Z
dc.date.available2016-06-07T08:33:10Z
dc.date.issued2011-12-15
dc.identifier.urihttp://repository.aust.edu.ng/xmlui/handle/123456789/392
dc.identifier.urihttp://library.aust.edu.ng:8080/xmlui/handle/123456789/392
dc.description.abstractWe propose a framework for formal analysis of DEVS Driven Modeling Language (DDML) models in order to assess and evaluate the properties of DDML models. This framework semantically maps the hierarchical levels of DDML: Input Output system (IOS), Input Output Relation Observation (IORO) and Coupled Network (CN) levels to corresponding formal methods: Labeled Transition System (LTS), Linear Temporal Logic (LTL) and Computation Tree Logic (CTL), and Communicating Sequential Processes (CSP) respectively. These formal methods capture the semantics of DDML at each level of abstraction and we use formal tools (such as JTORX, LTSA, PAT and NUSMV) to automatically analyze these formal specifications to evaluate properties of DDML models at each level.en_US
dc.language.isoenen_US
dc.subjectSoremekun Olamide Ezekielen_US
dc.subject2011 Computer Scienceen_US
dc.subjectFormal Analysis of DDMLen_US
dc.subjectDDMLen_US
dc.titleFormal Analysis of DDMLen_US
dc.typeThesisen_US


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