Browsing by Subject "cache coherence"

Now showing items 1-2 of 2

  • Library Cache Coherence 

    Unknown author (2011-05-02)
    Directory-based cache coherence is a popular mechanism for chip multiprocessors and multicores. The directory protocol, however, requires multicast for invalidation messages and the collection of acknowledgement messages, ...

  • Scalable directoryless shared memory coherence using execution migration 

    Unknown author (2010-11-22)
    We introduce the concept of deadlock-free migration-based coherent shared memory to the NUCA family of architectures. Migration-based architectures move threads among cores to guarantee sequential semantics in large ...