Search
Now showing items 1271-1280 of 1850
Automatic Parallelization With Statistical Accuracy Bounds
(2010-02-10)
Traditional parallelizing compilers are designed to generate parallel programs that produce identical outputs as the original sequential program. The difficulty of performing the program analysis required to satisfy this ...
Relational Cloud: The Case for a Database Service
(2010-03-14)
In this paper, we make the case for â databases as a serviceâ (DaaS), with two target scenarios in mind: (i) consolidation of data management functionality for large organizations and (ii) outsourcing data management ...
Core Count vs Cache Size for Manycore Architectures in the Cloud
(2010-02-11)
The number of cores which fit on a single chip is growing at an exponential rate while off-chip main memory bandwidth is growing at a linear rate at best. This core count to off-chip bandwidth disparity causes per-core ...
Computational Re-Photography
(2010-04-07)
Rephotographers aim to recapture an existing photograph from the same viewpoint. A historical photograph paired with a well-aligned modern rephotograph can serve as a remarkable visualization of the passage of time. However, ...
CNS: a GPU-based framework for simulating cortically-organized networks
(2010-02-26)
Computational models whose organization is inspired by the cortex are increasing in both number and popularity. Current instances of such models include convolutional networks, HMAX, Hierarchical Temporal Memory, and deep ...
Efficient Cache Coherence on Manycore Optical Networks
(2010-02-11)
Ever since industry has turned to parallelism instead of frequency scaling to improve processor performance, multicore processors have continued to scale to larger and larger numbers of cores. Some believe that multicores ...
Learning Generic Invariances in Object Recognition: Translation and Scale
(2010-12-30)
Invariance to various transformations is key to object recognition but existing definitions of invariance are somewhat confusing while discussions of invariance are often confused. In this report, we provide an operational ...
Heracles: Fully Synthesizable Parameterized MIPS-Based Multicore System
(2010-12-08)
Heracles is an open-source complete multicore system written in Verilog. It is fully parameterized and can be reconfigured and synthesized into different topologies and sizes. Each processing node has a 7-stage pipeline, ...
LEAP Scratchpads: Automatic Memory and Cache Management for Reconfigurable Logic [Extended Version]
(2010-11-23)
Developers accelerating applications on FPGAs or other reconfigurable logic have nothing but raw memory devices in their standard toolkits. Each project typically includes tedious development of single-use memory management. ...
Scalable directoryless shared memory coherence using execution migration
(2010-11-22)
We introduce the concept of deadlock-free migration-based coherent shared memory to the NUCA family of architectures. Migration-based architectures move threads among cores to guarantee sequential semantics in large ...