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Jenga: Harnessing Heterogeneous Memories through Reconfigurable Cache Hierarchies

dc.date.accessioned2015-12-21T19:00:18Z
dc.date.accessioned2018-11-26T22:27:31Z
dc.date.available2015-12-21T19:00:18Z
dc.date.available2018-11-26T22:27:31Z
dc.date.issued2015-12-19
dc.identifier.urihttp://hdl.handle.net/1721.1/100466
dc.identifier.urihttp://repository.aust.edu.ng/xmlui/handle/1721.1/100466
dc.description.abstractConventional memory systems are organized as a rigid hierarchy, with multiple levels of progressively larger and slower memories. Hierarchy allows a simple, fixed design to benefit a wide range of applications, because working sets settle at the smallest (and fastest) level they fit in. However, rigid hierarchies also cause significant overheads, because each level adds latency and energy even when it does not capture the working set. In emerging systems with heterogeneous memory technologies such as stacked DRAM, these overheads often limit performance and efficiency. We propose Jenga, a reconfigurable cache hierarchy that avoids these pathologies and approaches the performance of a hierarchy optimized for each application. Jenga monitors application behavior and dynamically builds virtual cache hierarchies out of heterogeneous, distributed cache banks. Jenga uses simple hardware support and a novel software runtime to configure virtual cache hierarchies. On a 36-core CMP with a 1 GB stacked-DRAM cache, Jenga outperforms a combination of state-of-the-art techniques by 10% on average and by up to 36%, and does so while saving energy, improving system-wide energy-delay product by 29% on average and by up to 96%.en_US
dc.format.extent12 p.en_US
dc.rightsCreative Commons Attribution 4.0 Internationalen
dc.rights.urihttp://creativecommons.org/licenses/by/4.0/
dc.titleJenga: Harnessing Heterogeneous Memories through Reconfigurable Cache Hierarchiesen_US


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Creative Commons Attribution 4.0 International
Except where otherwise noted, this item's license is described as Creative Commons Attribution 4.0 International