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Stochastic Digital Circuits for Probabilistic Inference

dc.date.accessioned2008-11-24T16:30:26Z
dc.date.accessioned2018-11-26T22:25:49Z
dc.date.available2008-11-24T16:30:26Z
dc.date.available2018-11-26T22:25:49Z
dc.date.issued2008-11-24
dc.identifier.urihttp://hdl.handle.net/1721.1/43712
dc.identifier.urihttp://repository.aust.edu.ng/xmlui/handle/1721.1/43712
dc.description.abstractWe introduce combinational stochastic logic, an abstraction that generalizes deterministic digital circuit design (based on Boolean logic gates) to the probabilistic setting. We show how this logic can be combined with techniques from contemporary digital design to generate stateless and stateful circuits for exact and approximate sampling from a range of probability distributions. We focus on Markov chain Monte Carlo algorithms for Markov random fields, using massively parallel circuits. We implement these circuits on commodity reconfigurable logic and estimate the resulting performance in time, space and price. Using our approach, these simple and general algorithms could be affordably run for thousands of iterations on models with hundreds of thousands of variables in real time.en_US
dc.format.extent10 p.en_US
dc.subjectcognitive scienceen_US
dc.subjectrobustnessen_US
dc.subjectBayesian inferenceen_US
dc.subjectartificial intelligenceen_US
dc.titleStochastic Digital Circuits for Probabilistic Inferenceen_US


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