A Comparison of Hardware Implementations for Low-Level Vision Algorithms
dc.date.accessioned | 2004-10-04T15:14:34Z | |
dc.date.accessioned | 2018-11-24T10:14:32Z | |
dc.date.available | 2004-10-04T15:14:34Z | |
dc.date.available | 2018-11-24T10:14:32Z | |
dc.date.issued | 1989-11-01 | en_US |
dc.identifier.uri | http://hdl.handle.net/1721.1/6521 | |
dc.identifier.uri | http://repository.aust.edu.ng/xmlui/handle/1721.1/6521 | |
dc.description.abstract | Early and intermediate vision algorithms, such as smoothing and discontinuity detection, are often implemented on general-purpose serial, and more recently, parallel computers. Special-purpose hardware implementations of low-level vision algorithms may be needed to achieve real-time processing. This memo reviews and analyzes some hardware implementations of low-level vision algorithms. Two types of hardware implementations are considered: the digital signal processing chips of Ruetz (and Broderson) and the analog VLSI circuits of Carver Mead. The advantages and disadvantages of these two approaches for producing a general, real-time vision system are considered. | en_US |
dc.format.extent | 5442007 bytes | |
dc.format.extent | 2098467 bytes | |
dc.language.iso | en_US | |
dc.title | A Comparison of Hardware Implementations for Low-Level Vision Algorithms | en_US |
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