Now showing items 1-6 of 6
Object Oriented Implementations for DEVS Formalism
Discrete Event System Specification (DEVS) formalism is a Modeling and Simulation (M&S) framework that provides a means of specifying an object called a system. This work presents implementations of this formalism using ...
Designing a Runtime Simulator for Queue Core Processor
A Model-View-Controller Based Platform for the Modeling and Simulation of the Hoist Scheduling Problem
The hoist scheduling problem is a critical issue in the design and control of many manufacturing processes. When the hoist number and tank numbers are very large, finding an optimal schedule is very hard. As a result of ...
Effective Dynamic Re-mapping Algorithm for low power Network- on-chip NoC.
With the increase in the possibility of incorporating multiple cores on a single chip (MCSoC), the issue of an efficient interconnection that is scalable, takes up small area and has low power consumption must be taken ...
An Eclipse-Based Graphical Modeling Tool for Discrete Event Simulation
We propose DEVS-Driven Modeling Language (DDML), a graphical notation for DEVS  modeling and an Eclipse-based graphical editor, Eclipse-DDML. DDML attempts to bridge the gap between expert modelers and domain experts ...
Performance Evaluation of Queue Processors Vs Risc Architecture
Nowadays, shifts in Hardware and Software technologies have forced designers and users to look at micro-architecture that process instructions stream with high performance and low power consumption. In Striving for such ...